From b237989c9ecf851bb98f1e563817024b7690f4be Mon Sep 17 00:00:00 2001 From: "Keith M. Wesolowski" Date: Sun, 1 Feb 2004 18:16:08 -0800 Subject: [PATCH] [SPARC32]: Align pkmap properly. Align the pkmap area on a 4MB region so that a single large pagetable can be used. Fixes random killing of processes which used high memory. --- arch/sparc/mm/srmmu.c | 20 -------------------- include/asm-sparc/highmem.h | 6 ++++-- include/asm-sparc/pgtsrmmu.h | 19 +++++++++++++++++++ 3 files changed, 23 insertions(+), 22 deletions(-) diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c index 5109625cad58f..0a0e52cad279f 100644 --- a/arch/sparc/mm/srmmu.c +++ b/arch/sparc/mm/srmmu.c @@ -51,26 +51,6 @@ #include -/* - * To support pagetables in highmem, Linux introduces APIs which - * return struct page* and generally manipulate page tables when - * they are not mapped into kernel space. Our hardware page tables - * are smaller than pages. We lump hardware tabes into big, page sized - * software tables. - * - * PMD_SHIFT determines the size of the area a second-level page table entry - * can map, and our pmd_t is 16 times larger than normal. - */ -#define SRMMU_PTRS_PER_PMD_SOFT 0x4 /* Each pmd_t contains 16 hard PTPs */ -#define SRMMU_PTRS_PER_PTE_SOFT 0x400 /* 16 hard tables per 4K page */ -#define SRMMU_PTE_SZ_SOFT 0x1000 /* same as above, in bytes */ - -#define SRMMU_PMD_SHIFT_SOFT 22 -#define SRMMU_PMD_SIZE_SOFT (1UL << SRMMU_PMD_SHIFT_SOFT) -#define SRMMU_PMD_MASK_SOFT (~(SRMMU_PMD_SIZE_SOFT-1)) -// #define SRMMU_PMD_ALIGN(addr) (((addr)+SRMMU_PMD_SIZE-1)&SRMMU_PMD_MASK) - - enum mbus_module srmmu_modtype; unsigned int hwbug_bitmask; int vac_cache_size; diff --git a/include/asm-sparc/highmem.h b/include/asm-sparc/highmem.h index f2795c8dcddda..7ca1a85c26e9e 100644 --- a/include/asm-sparc/highmem.h +++ b/include/asm-sparc/highmem.h @@ -38,10 +38,12 @@ extern void kmap_init(void) __init; /* * Right now we initialize only a single pte table. It can be extended * easily, subsequent pte tables have to be allocated in one physical - * chunk of RAM. + * chunk of RAM. Currently the simplest way to do this is to align the + * pkmap region on a pagetable boundary (4MB). */ -#define PKMAP_BASE (SRMMU_NOCACHE_VADDR + (SRMMU_MAX_NOCACHE_PAGES << PAGE_SHIFT)) #define LAST_PKMAP 1024 +#define PKMAP_SIZE (LAST_PKMAP << PAGE_SHIFT) +#define PKMAP_BASE SRMMU_PMD_ALIGN_SOFT(SRMMU_NOCACHE_VADDR + (SRMMU_MAX_NOCACHE_PAGES << PAGE_SHIFT)) #define LAST_PKMAP_MASK (LAST_PKMAP - 1) #define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT) diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h index dee6984d949f2..0a6f80c5d68ce 100644 --- a/include/asm-sparc/pgtsrmmu.h +++ b/include/asm-sparc/pgtsrmmu.h @@ -36,6 +36,25 @@ #define SRMMU_PMD_TABLE_SIZE 0x100 /* 64 entries, 4 bytes a piece */ #define SRMMU_PGD_TABLE_SIZE 0x400 /* 256 entries, 4 bytes a piece */ +/* + * To support pagetables in highmem, Linux introduces APIs which + * return struct page* and generally manipulate page tables when + * they are not mapped into kernel space. Our hardware page tables + * are smaller than pages. We lump hardware tabes into big, page sized + * software tables. + * + * PMD_SHIFT determines the size of the area a second-level page table entry + * can map, and our pmd_t is 16 times larger than normal. + */ +#define SRMMU_PTRS_PER_PTE_SOFT (PAGE_SIZE/4) /* 16 hard tables per 4K page */ +#define SRMMU_PTRS_PER_PMD_SOFT 4 /* Each pmd_t contains 16 hard PTPs */ +#define SRMMU_PTE_SZ_SOFT PAGE_SIZE /* same as above, in bytes */ + +#define SRMMU_PMD_SHIFT_SOFT 22 +#define SRMMU_PMD_SIZE_SOFT (1UL << SRMMU_PMD_SHIFT_SOFT) +#define SRMMU_PMD_MASK_SOFT (~(SRMMU_PMD_SIZE_SOFT-1)) +#define SRMMU_PMD_ALIGN_SOFT(addr) (((addr)+SRMMU_PMD_SIZE_SOFT-1)&SRMMU_PMD_MASK_SOFT) + /* Definition of the values in the ET field of PTD's and PTE's */ #define SRMMU_ET_MASK 0x3 #define SRMMU_ET_INVALID 0x0 -- 2.53.0