From b8f652d56f34bc2ce6e3505bbf7d3746d33eb022 Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@muc.de>
Date: Thu, 24 Apr 2003 08:34:58 -0700
Subject: [PATCH] [PATCH] Minor 32bit Opteron fixes

Don't disable the Northbridge Machine Check.

Use the unrolled "INTEL_USERCOPY" too.
---
 arch/i386/Kconfig                | 2 +-
 arch/i386/kernel/cpu/mcheck/k7.c | 3 ---
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index 9df31a9bb24c1..234e92cbf4bac 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -345,7 +345,7 @@ config X86_GOOD_APIC
 
 config X86_INTEL_USERCOPY
 	bool
-	depends on MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M586MMX
+	depends on MPENTIUM4 || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7
 	default y
 
 config X86_USE_PPRO_CHECKSUM
diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/i386/kernel/cpu/mcheck/k7.c
index 37ae4a9d3d1c0..911f4bf43348c 100644
--- a/arch/i386/kernel/cpu/mcheck/k7.c
+++ b/arch/i386/kernel/cpu/mcheck/k7.c
@@ -82,9 +82,6 @@ void __init amd_mcheck_init(struct cpuinfo_x86 *c)
 	nr_mce_banks = l & 0xff;
 
 	for (i=0; i<nr_mce_banks; i++) {
-		/* Don't enable northbridge MCE by default on Hammer */
-		if (boot_cpu_data.x86_model == 15 && i == 4) 
-			continue;
 		wrmsr (MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
 		wrmsr (MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
 	}
-- 
2.53.0