From c365dd4d4014b0eb1bb81540b764285ccb72971b Mon Sep 17 00:00:00 2001 From: "Martin J. Bligh" Date: Thu, 27 Feb 2003 23:02:42 -0800 Subject: [PATCH] [PATCH] Fix kirq_balance up so I can disable it. At the moment, there are two different switches used, irqbalance_disabled and no_balance_irq ... each of which switches half the code off. This patch harmonises them into one (irqbalance_disable), and uses the old subarch stuff as a default value so that this is auto-disabled on boxes like NUMA-Q that can't cope with it. Also renamed no_balance_irq to NO_BALANCE_IRQ as it's really a static defined number now, not pretending to be a switch variable any more. Now off by default for NUMA-Q, on by default for others, but can be disabled with the boot time flag if people desire. --- arch/i386/kernel/io_apic.c | 4 ++-- include/asm-i386/mach-bigsmp/mach_apic.h | 2 +- include/asm-i386/mach-default/mach_apic.h | 2 +- include/asm-i386/mach-numaq/mach_apic.h | 2 +- include/asm-i386/mach-summit/mach_apic.h | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c index 556f2237ee131..3d810b4996c6a 100644 --- a/arch/i386/kernel/io_apic.c +++ b/arch/i386/kernel/io_apic.c @@ -223,7 +223,7 @@ static void set_ioapic_affinity (unsigned int irq, unsigned long mask) extern unsigned long irq_affinity [NR_IRQS]; int __cacheline_aligned pending_irq_balance_apicid [NR_IRQS]; -static int irqbalance_disabled __initdata = 0; +static int irqbalance_disabled = NO_BALANCE_IRQ; static int physical_balance = 0; struct irq_cpu_info { @@ -492,7 +492,7 @@ static inline void balance_irq (int cpu, int irq) unsigned long allowed_mask; unsigned int new_cpu; - if (no_balance_irq) + if (irqbalance_disabled) return; allowed_mask = cpu_online_map & irq_affinity[irq]; diff --git a/include/asm-i386/mach-bigsmp/mach_apic.h b/include/asm-i386/mach-bigsmp/mach_apic.h index d5f799de14ef4..b6d7c5e946a3f 100644 --- a/include/asm-i386/mach-bigsmp/mach_apic.h +++ b/include/asm-i386/mach-bigsmp/mach_apic.h @@ -10,7 +10,7 @@ ((phys_apic) & (~0xf)) ) #endif -#define no_balance_irq (1) +#define NO_BALANCE_IRQ (1) #define esr_disable (1) static inline int apic_id_registered(void) diff --git a/include/asm-i386/mach-default/mach_apic.h b/include/asm-i386/mach-default/mach_apic.h index eb0b126c5b3c5..8a1311d6df7bc 100644 --- a/include/asm-i386/mach-default/mach_apic.h +++ b/include/asm-i386/mach-default/mach_apic.h @@ -9,7 +9,7 @@ #define TARGET_CPUS 0x01 #endif -#define no_balance_irq (0) +#define NO_BALANCE_IRQ (0) #define esr_disable (0) #define INT_DELIVERY_MODE dest_LowestPrio diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-i386/mach-numaq/mach_apic.h index bb63a26b3eb22..1b322209306e9 100644 --- a/include/asm-i386/mach-numaq/mach_apic.h +++ b/include/asm-i386/mach-numaq/mach_apic.h @@ -5,7 +5,7 @@ #define TARGET_CPUS (0xf) -#define no_balance_irq (1) +#define NO_BALANCE_IRQ (1) #define esr_disable (1) #define INT_DELIVERY_MODE dest_LowestPrio diff --git a/include/asm-i386/mach-summit/mach_apic.h b/include/asm-i386/mach-summit/mach_apic.h index 6ac0d6b9e861b..988e406473780 100644 --- a/include/asm-i386/mach-summit/mach_apic.h +++ b/include/asm-i386/mach-summit/mach_apic.h @@ -4,7 +4,7 @@ extern int x86_summit; #define esr_disable (x86_summit ? 1 : 0) -#define no_balance_irq (0) +#define NO_BALANCE_IRQ (0) #define XAPIC_DEST_CPUS_MASK 0x0Fu #define XAPIC_DEST_CLUSTER_MASK 0xF0u -- 2.53.0