From c6a2a0807645155013b18075232af362c6d547dc Mon Sep 17 00:00:00 2001 From: Armin Schindler Date: Mon, 8 Sep 2003 23:01:19 -0700 Subject: [PATCH] [PATCH] eicon ISDN driver: memory attach Access to cards memory now uses macros to attach to the correct memory area of the card. --- drivers/isdn/hardware/eicon/io.c | 140 +++++++++++++------- drivers/isdn/hardware/eicon/io.h | 11 +- drivers/isdn/hardware/eicon/os_4bri.c | 175 ++++++++++++++----------- drivers/isdn/hardware/eicon/os_bri.c | 116 ++++++++++------ drivers/isdn/hardware/eicon/os_pri.c | 150 ++++++++++++++------- drivers/isdn/hardware/eicon/platform.h | 30 +++++ drivers/isdn/hardware/eicon/s_4bri.c | 130 ++++++++++++------ drivers/isdn/hardware/eicon/s_bri.c | 95 ++++++++++---- drivers/isdn/hardware/eicon/s_pri.c | 107 ++++++++++----- 9 files changed, 637 insertions(+), 317 deletions(-) diff --git a/drivers/isdn/hardware/eicon/io.c b/drivers/isdn/hardware/eicon/io.c index d604ab5f0a36b..6f94ee9328ee4 100644 --- a/drivers/isdn/hardware/eicon/io.c +++ b/drivers/isdn/hardware/eicon/io.c @@ -72,10 +72,10 @@ IDI_CALL Requests[MAX_ADAPTER] = */ static byte extended_xdi_features[DIVA_XDI_EXTENDED_FEATURES_MAX_SZ+1] = { (DIVA_XDI_EXTENDED_FEATURES_VALID | - DIVA_XDI_EXTENDED_FEATURE_CMA | DIVA_XDI_EXTENDED_FEATURE_SDRAM_BAR | DIVA_XDI_EXTENDED_FEATURE_CAPI_PRMS | #if defined(DIVA_IDI_RX_DMA) + DIVA_XDI_EXTENDED_FEATURE_CMA | DIVA_XDI_EXTENDED_FEATURE_RX_DMA | #endif DIVA_XDI_EXTENDED_FEATURE_NO_CANCEL_RC), @@ -156,7 +156,8 @@ void dump_trap_frame (PISDN_ADAPTER IoAdapter, byte *exceptionFrame) { MP_XCPTC *xcept = (MP_XCPTC *)exceptionFrame ; - dword *regs = &xcept->regs[0] ; + dword *regs; + regs = &xcept->regs[0] ; DBG_FTL(("%s: ***************** CPU TRAPPED *****************", &IoAdapter->Name[0])) DBG_FTL(("Microcode: %s", &IoAdapter->ProtocolIdString[0])) @@ -567,26 +568,38 @@ Trapped: /*------------------------------------------------------------------*/ byte mem_in (ADAPTER *a, void *addr) { - byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; - return (*Base) ; + byte val; + volatile byte* Base; + + Base = (volatile byte *)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); + val = *(Base + (unsigned long)addr); + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); + return (val); } word mem_inw (ADAPTER *a, void *addr) { - word* Base = (word*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; - return (READ_WORD(Base)) ; + word val; + volatile byte* Base; + + Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); + val = READ_WORD((Base + (unsigned long)addr)); + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); + return (val); } void mem_in_dw (ADAPTER *a, void *addr, dword* data, int dwords) { - volatile dword* Base = (dword*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; + volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); while (dwords--) { - *data++ = READ_DWORD(Base); - Base++; + *data++ = READ_DWORD((Base + (unsigned long)addr)); + addr+=4; } + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); } void mem_in_buffer (ADAPTER *a, void *addr, void *buffer, word length) { - byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; - memcpy (buffer, Base, length) ; + volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); + memcpy (buffer, (void *)(Base + (unsigned long)addr), length); + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); } void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e) { @@ -598,99 +611,130 @@ void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e) } void mem_out (ADAPTER *a, void *addr, byte data) { - byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; - *Base = data ; + volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); + *(Base + (unsigned long)addr) = data ; + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); } void mem_outw (ADAPTER *a, void *addr, word data) { - word* Base = (word*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; - WRITE_WORD(Base, data); + volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); + WRITE_WORD((Base + (unsigned long)addr), data); + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); } void mem_out_dw (ADAPTER *a, void *addr, const dword* data, int dwords) { - volatile dword* Base = (dword*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; + volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); while (dwords--) { - WRITE_DWORD(Base, *data); - Base++; + WRITE_DWORD((Base + (unsigned long)addr), *data); + addr+=4; data++; } + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); } void mem_out_buffer (ADAPTER *a, void *addr, void *buffer, word length) { - byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; - memcpy (Base, buffer, length) ; + volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); + memcpy ((void *)(Base + (unsigned long)addr), buffer, length) ; + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); } void mem_inc (ADAPTER *a, void *addr) { - byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; - byte x = *Base ; - *Base = x + 1 ; + volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io); + byte x = *(Base + (unsigned long)addr); + *(Base + (unsigned long)addr) = x + 1 ; + DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base); } /*------------------------------------------------------------------*/ /* ram access functions for io-mapped cards */ /*------------------------------------------------------------------*/ byte io_in(ADAPTER * a, void * adr) { - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - return inpp(((PISDN_ADAPTER)a->io)->port); + byte val; + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); + outppw(Port + 4, (word)(unsigned long)adr); + val = inpp(Port); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); + return(val); } word io_inw(ADAPTER * a, void * adr) { - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - return inppw(((PISDN_ADAPTER)a->io)->port); + word val; + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); + outppw(Port + 4, (word)(unsigned long)adr); + val = inppw(Port); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); + return(val); } void io_in_buffer(ADAPTER * a, void * adr, void * buffer, word len) { + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); byte* P = (byte*)buffer; if ((long)adr & 1) { - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - *P = inpp(((PISDN_ADAPTER)a->io)->port); + outppw(Port+4, (word)(unsigned long)adr); + *P = inpp(Port); P++; adr = ((byte *) adr) + 1; len--; - if (!len) return; + if (!len) { + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); + return; } - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - inppw_buffer (((PISDN_ADAPTER)a->io)->port, P, len+1); + } + outppw(Port+4, (word)(unsigned long)adr); + inppw_buffer (Port, P, len+1); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); } void io_look_ahead(ADAPTER * a, PBUFFER * RBuffer, ENTITY * e) { - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)RBuffer); - ((PISDN_ADAPTER)a->io)->RBuffer.length = inppw(((PISDN_ADAPTER)a->io)->port); - inppw_buffer (((PISDN_ADAPTER)a->io)->port, ((PISDN_ADAPTER)a->io)->RBuffer.P, ((PISDN_ADAPTER)a->io)->RBuffer.length + 1); + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); + outppw(Port+4, (word)(unsigned long)RBuffer); + ((PISDN_ADAPTER)a->io)->RBuffer.length = inppw(Port); + inppw_buffer (Port, ((PISDN_ADAPTER)a->io)->RBuffer.P, ((PISDN_ADAPTER)a->io)->RBuffer.length + 1); e->RBuffer = (DBUFFER *) &(((PISDN_ADAPTER)a->io)->RBuffer); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); } void io_out(ADAPTER * a, void * adr, byte data) { - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - outpp(((PISDN_ADAPTER)a->io)->port, data); + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); + outppw(Port+4, (word)(unsigned long)adr); + outpp(Port, data); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); } void io_outw(ADAPTER * a, void * adr, word data) { - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - outppw(((PISDN_ADAPTER)a->io)->port, data); + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); + outppw(Port+4, (word)(unsigned long)adr); + outppw(Port, data); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); } void io_out_buffer(ADAPTER * a, void * adr, void * buffer, word len) { + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); byte* P = (byte*)buffer; if ((long)adr & 1) { - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - outpp(((PISDN_ADAPTER)a->io)->port, *P); + outppw(Port+4, (word)(unsigned long)adr); + outpp(Port, *P); P++; adr = ((byte *) adr) + 1; len--; - if (!len) return; + if (!len) { + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); + return; + } } - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - outppw_buffer (((PISDN_ADAPTER)a->io)->port, P, len+1); + outppw(Port+4, (word)(unsigned long)adr); + outppw_buffer (Port, P, len+1); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); } void io_inc(ADAPTER * a, void * adr) { byte x; - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - x = inpp(((PISDN_ADAPTER)a->io)->port); - outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); - outpp(((PISDN_ADAPTER)a->io)->port, x+1); + byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io); + outppw(Port+4, (word)(unsigned long)adr); + x = inpp(Port); + outppw(Port+4, (word)(unsigned long)adr); + outpp(Port, x+1); + DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port); } /*------------------------------------------------------------------*/ /* OS specific functions related to queuing of entities */ diff --git a/drivers/isdn/hardware/eicon/io.h b/drivers/isdn/hardware/eicon/io.h index 532b3b4e87da7..3e54039839a0f 100644 --- a/drivers/isdn/hardware/eicon/io.h +++ b/drivers/isdn/hardware/eicon/io.h @@ -39,14 +39,6 @@ typedef struct { DEVICE_NAME DeviceName[4] ; PISDN_ADAPTER QuadroAdapter[4] ; } ADAPTER_LIST_ENTRY, *PADAPTER_LIST_ENTRY ; -/* -------------------------------------------------------------------------- - Special OS memory support structures - -------------------------------------------------------------------------- */ -#define MAX_MAPPED_ENTRIES 8 -typedef struct { - void * Address; - dword Length; -} ADAPTER_MEMORY ; /* -------------------------------------------------------------------------- Configuration of XDI clients carried by XDI -------------------------------------------------------------------------- */ @@ -71,7 +63,6 @@ struct _ISDN_ADAPTER { /* remember mapped memory areas */ - ADAPTER_MEMORY MappedMemory[MAX_MAPPED_ENTRIES] ; CARD_PROPERTIES Properties ; dword cardType ; dword protocol_id ; /* configured protocol identifier */ @@ -97,6 +88,8 @@ struct _ISDN_ADAPTER { dword MemoryBase ; dword MemorySize ; byte *Address ; + byte *Config ; + byte *Control ; byte *reset ; byte *port ; byte *ram ; diff --git a/drivers/isdn/hardware/eicon/os_4bri.c b/drivers/isdn/hardware/eicon/os_4bri.c index a458e3be07cd0..f8dcf577199ca 100644 --- a/drivers/isdn/hardware/eicon/os_4bri.c +++ b/drivers/isdn/hardware/eicon/os_4bri.c @@ -1,4 +1,4 @@ -/* $Id: os_4bri.c,v 1.1.2.3 2001/02/14 21:10:19 armin Exp $ */ +/* $Id: os_4bri.c,v 1.25 2003/06/21 17:08:44 schindler Exp $ */ #include "platform.h" #include "debuglib.h" @@ -99,6 +99,40 @@ static int _4bri_is_rev_2_bri_card(int card_ordinal) return (0); } +static void diva_4bri_set_addresses(diva_os_xdi_adapter_t *a) +{ + dword offset = a->resources.pci.qoffset; + dword c_offset = offset * a->xdi_adapter.ControllerNumber; + + a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 2; + a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 2; + a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2; + a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 0; + a->resources.pci.mem_type_id[MEM_TYPE_CTLREG] = 3; + a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 0; + + /* + Set up hardware related pointers + */ + a->xdi_adapter.Address = a->resources.pci.addr[2]; /* BAR2 SDRAM */ + a->xdi_adapter.Address += c_offset; + + a->xdi_adapter.Control = a->resources.pci.addr[2]; /* BAR2 SDRAM */ + + a->xdi_adapter.ram = a->resources.pci.addr[2]; /* BAR2 SDRAM */ + a->xdi_adapter.ram += c_offset + (offset - MQ_SHARED_RAM_SIZE); + + a->xdi_adapter.reset = a->resources.pci.addr[0]; /* BAR0 CONFIG */ + /* + ctlReg contains the register address for the MIPS CPU reset control + */ + a->xdi_adapter.ctlReg = a->resources.pci.addr[3]; /* BAR3 CNTRL */ + /* + prom contains the register address for FPGA and EEPROM programming + */ + a->xdi_adapter.prom = &a->xdi_adapter.reset[0x6E]; +} + /* ** BAR0 - MEM - 0x100 - CONFIG MEM ** BAR1 - I/O - 0x100 - UNUSED @@ -110,11 +144,11 @@ static int _4bri_is_rev_2_bri_card(int card_ordinal) int diva_4bri_init_card(diva_os_xdi_adapter_t * a) { int bar, i; + byte *p; PADAPTER_LIST_ENTRY quadro_list; diva_os_xdi_adapter_t *diva_current; diva_os_xdi_adapter_t *adapter_list[4]; PISDN_ADAPTER Slave; - dword offset; unsigned long bar_length[sizeof(_4bri_bar_length) / sizeof(_4bri_bar_length[0])]; int v2 = _4bri_is_rev_2_card(a->CardOrdinal); @@ -142,7 +176,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) have to map any BAR before we can access it */ if (!_4bri_get_serial_number(a)) { - DBG_ERR(("A: 4BRI can't ger Serial Number")) + DBG_ERR(("A: 4BRI can't get Serial Number")) diva_4bri_cleanup_adapter(a); return (-1); } @@ -190,7 +224,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) for (bar = 0; bar < 4; bar++) { if (bar != 1) { /* ignore I/O */ a->resources.pci.addr[bar] = - divasa_remap_pci_bar(a->resources.pci.bar[bar], + divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar], bar_length[bar]); if (!a->resources.pci.addr[bar]) { DBG_ERR(("A: 4BRI: can't map bar[%d]", bar)) @@ -205,14 +239,15 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) */ sprintf(&a->port_name[0], "DIVA 4BRI %ld", (long) a->xdi_adapter.serialNo); - if (diva_os_register_io_port(1, a->resources.pci.bar[1], - bar_length[1], &a->port_name[0])) { + if (diva_os_register_io_port(a, 1, a->resources.pci.bar[1], + bar_length[1], &a->port_name[0], 1)) { DBG_ERR(("A: 4BRI: can't register bar[1]")) diva_4bri_cleanup_adapter(a); return (-1); } - a->resources.pci.addr[1] = (void *) (unsigned long) a->resources.pci.bar[1]; + a->resources.pci.addr[1] = + (void *) (unsigned long) a->resources.pci.bar[1]; /* Set cleanup pointer for base adapter only, so slave adapter @@ -265,8 +300,8 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) (PADAPTER_LIST_ENTRY) diva_os_malloc(0, sizeof(*quadro_list)); if (!(a->slave_list = quadro_list)) { for (i = 0; i < (tasks - 1); i++) { - diva_os_free(0, a->slave_adapters[bar]); - a->slave_adapters[bar] = 0; + diva_os_free(0, a->slave_adapters[i]); + a->slave_adapters[i] = 0; } diva_4bri_cleanup_adapter(a); return (-1); @@ -359,60 +394,39 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) prepare_qBri_functions(&a->xdi_adapter); } + for (i = 0; i < tasks; i++) { + diva_current = adapter_list[i]; + if (i) + memcpy(&diva_current->resources, &a->resources, sizeof(divas_card_resources_t)); + diva_current->resources.pci.qoffset = (a->xdi_adapter.MemorySize >> factor); + } + /* Set up hardware related pointers */ a->xdi_adapter.cfg = (void *) (unsigned long) a->resources.pci.bar[0]; /* BAR0 CONFIG */ a->xdi_adapter.port = (void *) (unsigned long) a->resources.pci.bar[1]; /* BAR1 */ - a->xdi_adapter.Address = a->resources.pci.addr[2]; /* BAR2 SDRAM */ - a->xdi_adapter.ctlReg = - (void *) (unsigned long) a->resources.pci.bar[3]; /* BAR3 CNTRL */ - - a->xdi_adapter.reset = a->resources.pci.addr[0]; /* BAR0 CONFIG */ - a->xdi_adapter.ram = a->resources.pci.addr[2]; /* BAR2 SDRAM */ - /* - ctlReg contains the register address for the MIPS CPU reset control - */ - a->xdi_adapter.ctlReg = a->resources.pci.addr[3]; /* BAR3 CNTRL */ - /* - prom contains the register address for FPGA and EEPROM programming - */ - a->xdi_adapter.prom = &a->xdi_adapter.reset[0x6E]; - /* - reset contains the base address for the PLX 9054 register set - */ - a->xdi_adapter.reset[PLX9054_INTCSR] = 0x00; /* disable PCI interrupts */ + a->xdi_adapter.ctlReg = (void *) (unsigned long) a->resources.pci.bar[3]; /* BAR3 CNTRL */ - /* - Replicate addresses to all instances, set shared memory - address for all instances - */ for (i = 0; i < tasks; i++) { + diva_current = adapter_list[i]; + diva_4bri_set_addresses(diva_current); Slave = a->xdi_adapter.QuadroList->QuadroAdapter[i]; - offset = - Slave->ControllerNumber * - (a->xdi_adapter.MemorySize >> factor); - Slave->Address = &a->xdi_adapter.Address[offset]; - Slave->ram = &a->xdi_adapter.ram[offset]; - Slave->reset = a->xdi_adapter.reset; - Slave->ctlReg = a->xdi_adapter.ctlReg; - Slave->prom = a->xdi_adapter.prom; - Slave->reset = a->xdi_adapter.reset; + Slave->MultiMaster = &a->xdi_adapter; Slave->sdram_bar = a->xdi_adapter.sdram_bar; - } - for (i = 0; i < tasks; i++) { - Slave = a->xdi_adapter.QuadroList->QuadroAdapter[i]; - Slave->ram += - ((a->xdi_adapter.MemorySize >> factor) - - MQ_SHARED_RAM_SIZE); - } - for (i = 1; i < tasks; i++) { - Slave = a->xdi_adapter.QuadroList->QuadroAdapter[i]; - Slave->serialNo = - ((dword) (Slave->ControllerNumber << 24)) | a-> - xdi_adapter.serialNo; + if (i) { + Slave->serialNo = ((dword) (Slave->ControllerNumber << 24)) | + a->xdi_adapter.serialNo; Slave->cardType = a->xdi_adapter.cardType; } + } + + /* + reset contains the base address for the PLX 9054 register set + */ + p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter); + p[PLX9054_INTCSR] = 0x00; /* disable PCI interrupts */ + DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p); /* Set IRQ handler @@ -484,8 +498,7 @@ static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a) if (bar != 1) { if (a->resources.pci.bar[bar] && a->resources.pci.addr[bar]) { - divasa_unmap_pci_bar(a->resources.pci. - addr[bar]); + divasa_unmap_pci_bar(a->resources.pci.addr[bar]); a->resources.pci.bar[bar] = 0; a->resources.pci.addr[bar] = 0; } @@ -496,12 +509,12 @@ static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a) Unregister I/O */ if (a->resources.pci.bar[1] && a->resources.pci.addr[1]) { - diva_os_register_io_port(0, a->resources.pci.bar[1], + diva_os_register_io_port(a, 0, a->resources.pci.bar[1], _4bri_is_rev_2_card(a-> CardOrdinal) ? _4bri_v2_bar_length[1] : _4bri_bar_length[1], - &a->port_name[0]); + &a->port_name[0], 1); a->resources.pci.bar[1] = 0; a->resources.pci.addr[1] = 0; } @@ -776,23 +789,18 @@ diva_4bri_cmd_card_proc(struct _diva_os_xdi_adapter *a, a->xdi_mbox. data_length); if (a->xdi_mbox.data) { - byte *src = - a->xdi_adapter.Address; - byte *dst = - a->xdi_mbox.data; - dword len = - a->xdi_mbox. - data_length; - - src += - cmd->command_data. - read_sdram.offset; + byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter); + byte *src = p; + byte *dst = a->xdi_mbox.data; + dword len = a->xdi_mbox.data_length; + + src += cmd->command_data.read_sdram.offset; while (len--) { *dst++ = *src++; } - a->xdi_mbox.status = - DIVA_XDI_MBOX_BUSY; + DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p); + a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY; ret = 0; } } @@ -903,10 +911,12 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter, dword address, const byte * data, dword length, dword limit) { - byte *mem = IoAdapter->Address; + byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); + byte *mem = p; if (((address + length) >= limit) || !mem) { - DBG_ERR(("A: A(%d) write PRI address=0x%08lx", + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p); + DBG_ERR(("A: A(%d) write 4BRI address=0x%08lx", IoAdapter->ANum, address + length)) return (-1); } @@ -916,6 +926,7 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter, *mem++ = *data++; } + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p); return (0); } @@ -926,16 +937,18 @@ diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter, volatile word *signature; int started = 0; int i; + byte *p; /* start adapter */ start_qBri_hardware(IoAdapter); + p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter); /* wait for signature in shared memory (max. 3 seconds) */ - signature = (volatile word *) (&IoAdapter->ram[0x1E]); + signature = (volatile word *) (&p[0x1E]); for (i = 0; i < 300; ++i) { diva_os_wait(10); @@ -958,10 +971,12 @@ diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter, DBG_FTL(("%s: Adapter selftest failed, signature=%04x", IoAdapter->Properties.Name, READ_WORD(&signature[0]))) + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); (*(IoAdapter->trapFnc)) (IoAdapter); IoAdapter->stop(IoAdapter); return (-1); } + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); for (i = 0; i < IoAdapter->tasks; i++) { IoAdapter->QuadroList->QuadroAdapter[i]->Initialized = 1; @@ -997,13 +1012,16 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter) #ifdef SUPPORT_INTERRUPT_TEST_ON_4BRI int i; ADAPTER *a = &IoAdapter->a; + byte *p; IoAdapter->IrqCount = 0; if (IoAdapter->ControllerNumber > 0) return (-1); - IoAdapter->reset[PLX9054_INTCSR] = PLX9054_INT_ENABLE; + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + p[PLX9054_INTCSR] = PLX9054_INT_ENABLE; + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); /* interrupt test */ @@ -1015,20 +1033,23 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter) return ((IoAdapter->IrqCount > 0) ? 0 : -1); #else dword volatile *qBriIrq; + byte *p; /* Reset on-board interrupt register */ IoAdapter->IrqCount = 0; - qBriIrq = - (dword volatile *) (&IoAdapter-> - ctlReg[_4bri_is_rev_2_card + p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + qBriIrq = (dword volatile *) (&p[_4bri_is_rev_2_card (IoAdapter-> cardType) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]); WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF); + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); - IoAdapter->reset[PLX9054_INTCSR] = PLX9054_INT_ENABLE; + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + p[PLX9054_INTCSR] = PLX9054_INT_ENABLE; + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); diva_os_wait(100); diff --git a/drivers/isdn/hardware/eicon/os_bri.c b/drivers/isdn/hardware/eicon/os_bri.c index 586f9df5c569e..0ca31608ec15c 100644 --- a/drivers/isdn/hardware/eicon/os_bri.c +++ b/drivers/isdn/hardware/eicon/os_bri.c @@ -1,4 +1,4 @@ -/* $Id: os_bri.c,v 1.1.2.2 2001/02/12 20:23:46 armin Exp $ */ +/* $Id: os_bri.c,v 1.18 2003/06/21 17:10:29 schindler Exp $ */ #include "platform.h" #include "debuglib.h" @@ -46,6 +46,27 @@ static int diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, dword start_address, dword features); static int diva_bri_stop_adapter(diva_os_xdi_adapter_t * a); +static void diva_bri_set_addresses(diva_os_xdi_adapter_t * a) +{ + a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0; + a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 1; + a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 2; + a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 1; + a->resources.pci.mem_type_id[MEM_TYPE_PORT] = 2; + a->resources.pci.mem_type_id[MEM_TYPE_CTLREG] = 2; + + a->xdi_adapter.ram = a->resources.pci.addr[0]; + a->xdi_adapter.cfg = a->resources.pci.addr[1]; + a->xdi_adapter.Address = a->resources.pci.addr[2]; + + a->xdi_adapter.reset = a->xdi_adapter.cfg; + a->xdi_adapter.port = a->xdi_adapter.Address; + + a->xdi_adapter.ctlReg = a->xdi_adapter.port + M_PCI_RESET; + + a->xdi_adapter.reset += 0x4C; /* PLX 9050 !! */ +} + /* ** BAR0 - MEM Addr - 0x80 - NOT USED ** BAR1 - I/O Addr - 0x80 @@ -58,6 +79,7 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) word cmd = 0, cmd_org; byte Bus, Slot; void *hdev; + byte *p; /* Set properties @@ -123,7 +145,7 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) Map and register resources */ if (!(a->resources.pci.addr[0] = - divasa_remap_pci_bar(a->resources.pci.bar[0], + divasa_remap_pci_bar(a, 0, a->resources.pci.bar[0], bri_bar_length[0]))) { DBG_ERR(("A: BRI, can't map BAR[0]")) diva_bri_cleanup_adapter(a); @@ -133,8 +155,8 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) sprintf(&a->port_name[0], "BRI %02x:%02x", a->resources.pci.bus, a->resources.pci.func); - if (diva_os_register_io_port(1, a->resources.pci.bar[1], - bri_bar_length[1], &a->port_name[0])) { + if (diva_os_register_io_port(a, 1, a->resources.pci.bar[1], + bri_bar_length[1], &a->port_name[0], 1)) { DBG_ERR(("A: BRI, can't register BAR[1]")) diva_bri_cleanup_adapter(a); return (-1); @@ -142,8 +164,8 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) a->resources.pci.addr[1] = (void *) (unsigned long) a->resources.pci.bar[1]; a->resources.pci.length[1] = bri_bar_length[1]; - if (diva_os_register_io_port(1, a->resources.pci.bar[2], - bar2_length, &a->port_name[0])) { + if (diva_os_register_io_port(a, 1, a->resources.pci.bar[2], + bar2_length, &a->port_name[0], 2)) { DBG_ERR(("A: BRI, can't register BAR[2]")) diva_bri_cleanup_adapter(a); return (-1); @@ -151,6 +173,11 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) a->resources.pci.addr[2] = (void *) (unsigned long) a->resources.pci.bar[2]; a->resources.pci.length[2] = bar2_length; + /* + Set all memory areas + */ + diva_bri_set_addresses(a); + /* Get Serial Number */ @@ -210,15 +237,9 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) a->interface.cleanup_adapter_proc = diva_bri_cleanup_adapter; a->interface.cmd_proc = diva_bri_cmd_card_proc; - a->xdi_adapter.cfg = a->resources.pci.addr[1]; - a->xdi_adapter.Address = a->resources.pci.addr[2]; - - a->xdi_adapter.reset = a->xdi_adapter.cfg; - a->xdi_adapter.port = a->xdi_adapter.Address; - - a->xdi_adapter.ctlReg = a->xdi_adapter.port + M_PCI_RESET; - a->xdi_adapter.reset += 0x4C; /* PLX 9050 !! */ - outpp(a->xdi_adapter.reset, 0x41); + p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter); + outpp(p, 0x41); + DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p); prepare_maestra_functions(&a->xdi_adapter); @@ -268,11 +289,11 @@ static int diva_bri_cleanup_adapter(diva_os_xdi_adapter_t * a) for (i = 1; i < 3; i++) { if (a->resources.pci.addr[i] && a->resources.pci.bar[i]) { - diva_os_register_io_port(0, + diva_os_register_io_port(a, 0, a->resources.pci.bar[i], a->resources.pci. length[i], - &a->port_name[0]); + &a->port_name[0], i); a->resources.pci.addr[i] = 0; a->resources.pci.bar[i] = 0; } @@ -314,18 +335,20 @@ static dword diva_bri_get_serial_number(diva_os_xdi_adapter_t * a) byte *confIO; word serHi, serLo, *confMem; - confIO = (byte *) a->resources.pci.addr[1]; + confIO = (byte *) DIVA_OS_MEM_ATTACH_CFG(&a->xdi_adapter); serHi = (word) (inppw(&confIO[0x22]) & 0x0FFF); serLo = (word) (inppw(&confIO[0x26]) & 0x0FFF); serNo = ((dword) serHi << 16) | (dword) serLo; + DIVA_OS_MEM_DETACH_CFG(&a->xdi_adapter, confIO); if ((serNo == 0) || (serNo == 0xFFFFFFFF)) { DBG_FTL(("W: BRI use BAR[0] to get card serial number")) - confMem = (word *) a->resources.pci.addr[0]; + confMem = (word *) DIVA_OS_MEM_ATTACH_RAM(&a->xdi_adapter); serHi = (word) (READ_WORD(&confMem[0x11]) & 0x0FFF); serLo = (word) (READ_WORD(&confMem[0x13]) & 0x0FFF); serNo = (((dword) serHi) << 16) | ((dword) serLo); + DIVA_OS_MEM_DETACH_RAM(&a->xdi_adapter, confMem); } DBG_LOG(("Serial Number=%ld", serNo)) @@ -342,9 +365,9 @@ static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a) int i; for (i = 1; i < 3; i++) { - diva_os_register_io_port(0, a->resources.pci.bar[i], + diva_os_register_io_port(a, 0, a->resources.pci.bar[i], a->resources.pci.length[i], - &a->port_name[0]); + &a->port_name[0], i); a->resources.pci.addr[i] = 0; } @@ -352,9 +375,9 @@ static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a) (long) a->xdi_adapter.serialNo); for (i = 1; i < 3; i++) { - if (diva_os_register_io_port(1, a->resources.pci.bar[i], + if (diva_os_register_io_port(a, 1, a->resources.pci.bar[i], a->resources.pci.length[i], - &a->port_name[0])) { + &a->port_name[0], i)) { DBG_ERR(("A: failed to reregister BAR[%d]", i)) return (-1); } @@ -493,6 +516,7 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter) { byte *addrHi, *addrLo, *ioaddr; dword i; + byte *Port; if (!IoAdapter->port) { return (-1); @@ -501,13 +525,13 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter) DBG_ERR(("A: A(%d) can't reset BRI adapter - please stop first", IoAdapter->ANum)) return (-1); } - addrHi = - IoAdapter->port + - ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); - addrLo = IoAdapter->port + ADDR; - ioaddr = IoAdapter->port + DATA; (*(IoAdapter->rstFnc)) (IoAdapter); diva_os_wait(100); + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); + addrLo = Port + ADDR; + ioaddr = Port + DATA; /* recover */ @@ -540,6 +564,8 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter) outppw(addrLo, (word) 0); outppw(ioaddr, (word) 0); + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); + /* Forget all outstanding entities */ @@ -578,16 +604,17 @@ diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter, dword address, const byte * data, dword length) { byte *addrHi, *addrLo, *ioaddr; + byte *Port; if (!IoAdapter->port) { return (-1); } - addrHi = - IoAdapter->port + + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); - addrLo = IoAdapter->port + ADDR; - ioaddr = IoAdapter->port + DATA; + addrLo = Port + ADDR; + ioaddr = Port + DATA; while (length--) { outpp(addrHi, (word) (address >> 16)); @@ -596,6 +623,7 @@ diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter, address++; } + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); return (0); } @@ -603,6 +631,7 @@ static int diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, dword start_address, dword features) { + byte *Port; dword i, test; byte *addrHi, *addrLo, *ioaddr; int started = 0; @@ -621,11 +650,11 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum); DBG_LOG(("A(%d) start BRI", IoAdapter->ANum)) - addrHi = - IoAdapter->port + + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); - addrLo = IoAdapter->port + ADDR; - ioaddr = IoAdapter->port + DATA; + addrLo = Port + ADDR; + ioaddr = Port + DATA; outpp(addrHi, (byte) ( @@ -633,12 +662,20 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, BRI_SHARED_RAM_SIZE) >> 16)); outppw(addrLo, 0x1e); outppw(ioaddr, 0x00); + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); /* start the protocol code */ - outpp(IoAdapter->ctlReg, 0x08); + Port = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + outpp(Port, 0x08); + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, Port); + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); + addrLo = Port + ADDR; + ioaddr = Port + DATA; /* wait for signature (max. 3 seconds) */ @@ -659,6 +696,7 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, break; } } + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); if (!started) { DBG_FTL(("A: A(%d) %s: Adapter selftest failed 0x%04X", @@ -677,7 +715,9 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, a->ReadyInt = 1; if (IoAdapter->reset) { - outpp(IoAdapter->reset, 0x41); + Port = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + outpp(Port, 0x41); + DIVA_OS_MEM_DETACH_RESET(IoAdapter, Port); } a->ram_out(a, &PR_RAM->ReadyInt, 1); diff --git a/drivers/isdn/hardware/eicon/os_pri.c b/drivers/isdn/hardware/eicon/os_pri.c index 1f746bfe7d72e..cab364b74f331 100644 --- a/drivers/isdn/hardware/eicon/os_pri.c +++ b/drivers/isdn/hardware/eicon/os_pri.c @@ -1,4 +1,4 @@ -/* $Id: os_pri.c,v 1.1.2.3 2001/02/14 21:10:19 armin Exp $ */ +/* $Id: os_pri.c,v 1.29 2003/08/25 13:41:27 schindler Exp $ */ #include "platform.h" #include "debuglib.h" @@ -57,6 +57,34 @@ static int pri_is_rev_2_card(int card_ordinal) return (0); } +static void diva_pri_set_addresses(diva_os_xdi_adapter_t * a) +{ + a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 0; + a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2; + a->resources.pci.mem_type_id[MEM_TYPE_CONFIG] = 4; + a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0; + a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 2; + a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 4; + a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 3; + + a->xdi_adapter.Address = a->resources.pci.addr[0]; + a->xdi_adapter.Control = a->resources.pci.addr[2]; + a->xdi_adapter.Config = a->resources.pci.addr[4]; + + a->xdi_adapter.ram = a->resources.pci.addr[0]; + a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET; + + a->xdi_adapter.reset = a->resources.pci.addr[2]; + a->xdi_adapter.reset += MP_RESET; + + a->xdi_adapter.cfg = a->resources.pci.addr[4]; + a->xdi_adapter.cfg += MP_IRQ_RESET; + + a->xdi_adapter.sdram_bar = a->resources.pci.bar[0]; + + a->xdi_adapter.prom = a->resources.pci.addr[3]; +} + /* ** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2 ** BAR1 - DEVICES, 0x1000 @@ -117,7 +145,7 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a) */ for (bar = 0; bar < 5; bar++) { a->resources.pci.addr[bar] = - divasa_remap_pci_bar(a->resources.pci.bar[bar], + divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar], bar_length[bar]); if (!a->resources.pci.addr[bar]) { DBG_ERR(("A: A(%d), can't map bar[%d]", @@ -127,6 +155,11 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a) } } + /* + Set all memory areas + */ + diva_pri_set_addresses(a); + /* Get Serial Number of this adapter */ @@ -194,23 +227,6 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a) prepare_pri_functions(&a->xdi_adapter); } - /* - Set all memory areas - */ - a->xdi_adapter.Address = a->resources.pci.addr[0]; - a->xdi_adapter.sdram_bar = a->resources.pci.bar[0]; - a->xdi_adapter.ram = a->resources.pci.addr[0]; - a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET; - - a->xdi_adapter.reset = a->resources.pci.addr[2]; - a->xdi_adapter.reset += MP_RESET; - - a->xdi_adapter.prom = - (byte *) (unsigned long) a->resources.pci.bar[3]; - - a->xdi_adapter.cfg = a->resources.pci.addr[4]; - a->xdi_adapter.cfg += MP_IRQ_RESET; - a->dsp_mask = diva_pri_detect_dsps(a); /* @@ -317,7 +333,7 @@ static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a) static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter) { dword i; - struct mp_load *boot = (struct mp_load *) IoAdapter->Address; + struct mp_load *boot; if (!IoAdapter->Address || !IoAdapter->reset) { return (-1); @@ -328,12 +344,20 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter) return (-1); } + boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); WRITE_DWORD(&boot->err, 0); + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); + IoAdapter->rstFnc(IoAdapter); + diva_os_wait(10); + + boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); i = READ_DWORD(&boot->live); + diva_os_wait(10); if (i == READ_DWORD(&boot->live)) { + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!", IoAdapter->ANum, IoAdapter->serialNo)) return (-1); @@ -342,8 +366,10 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter) DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx", IoAdapter->ANum, IoAdapter->serialNo, READ_DWORD(&boot->err))) + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); return (-1); } + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); /* Forget all outstanding entities @@ -383,9 +409,11 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter, dword address, const byte * data, dword length, dword limit) { - byte *mem = IoAdapter->Address; + byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); + byte *mem = p; if (((address + length) >= limit) || !mem) { + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p); DBG_ERR(("A: A(%d) write PRI address=0x%08lx", IoAdapter->ANum, address + length)) return (-1); @@ -396,6 +424,7 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter, *mem++ = *data++; } + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p); return (0); } @@ -405,15 +434,18 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, { dword i; int started = 0; - struct mp_load *boot = (struct mp_load *) IoAdapter->Address; + byte *p; + struct mp_load *boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); ADAPTER *a = &IoAdapter->a; if (IoAdapter->Initialized) { + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running", IoAdapter->ANum)) return (-1); } if (!boot) { + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); DBG_ERR(("A: PRI %ld can't start, adapter not mapped", IoAdapter->serialNo)) return (-1); @@ -437,17 +469,22 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, } if (!started) { - dword TrapId = READ_DWORD(&IoAdapter->Address[0x80]); - dword debug = READ_DWORD(&IoAdapter->Address[0x1c]); + byte *p = (byte *)boot; + dword TrapId; + dword debug; + TrapId = READ_DWORD(&p[0x80]); + debug = READ_DWORD(&p[0x1c]); DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx", IoAdapter->ANum, READ_DWORD(&boot->signature), TrapId, debug)) + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); if (IoAdapter->trapFnc) { (*(IoAdapter->trapFnc)) (IoAdapter); } IoAdapter->stop(IoAdapter); return (-1); } + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); IoAdapter->Initialized = TRUE; @@ -455,8 +492,9 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, Check Interrupt */ IoAdapter->IrqCount = 0; - WRITE_DWORD(((dword volatile *) IoAdapter->cfg), - (dword) ~ 0x03E00000); + p = DIVA_OS_MEM_ATTACH_CFG(IoAdapter); + WRITE_DWORD(((dword volatile *) p), (dword) ~ 0x03E00000); + DIVA_OS_MEM_DETACH_CFG(IoAdapter, p); a->ReadyInt = 1; a->ram_out(a, &PR_RAM->ReadyInt, 1); @@ -658,7 +696,8 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a, diva_os_malloc(0, a->xdi_mbox.data_length); if (a->xdi_mbox.data) { dword *data = (dword *) a->xdi_mbox.data; - if (!a->xdi_adapter.ram || !a->xdi_adapter.reset || + if (!a->xdi_adapter.ram || + !a->xdi_adapter.reset || !a->xdi_adapter.cfg) { *data = 3; } else if (a->xdi_adapter.trapped) { @@ -691,23 +730,18 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a, a->xdi_mbox. data_length); if (a->xdi_mbox.data) { - byte *src = - a->xdi_adapter.Address; - byte *dst = - a->xdi_mbox.data; - dword len = - a->xdi_mbox. - data_length; - - src += - cmd->command_data. - read_sdram.offset; + byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter); + byte *src = p; + byte *dst = a->xdi_mbox.data; + dword len = a->xdi_mbox.data_length; + + src += cmd->command_data.read_sdram.offset; while (len--) { *dst++ = *src++; } - a->xdi_mbox.status = - DIVA_XDI_MBOX_BUSY; + a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY; + DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p); ret = 0; } } @@ -731,27 +765,33 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a) byte data[64]; int i; dword len = sizeof(data); - volatile byte *config = (byte *) a->resources.pci.addr[4]; - volatile byte *flash = (byte *) a->resources.pci.addr[3]; + volatile byte *config; + volatile byte *flash; /* * First set some GT6401x config registers before accessing the BOOT-ROM */ + config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); if (!(config[0xc3c] & 0x08)) { config[0xc3c] |= 0x08; /* Base Address enable register */ } config[LOW_BOOTCS_DREG] = 0x00; config[HI_BOOTCS_DREG] = 0xFF; + DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); /* * Read only the last 64 bytes of manufacturing data */ memset(data, '\0', len); + flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter); for (i = 0; i < len; i++) { data[i] = flash[0x8000 - len + i]; } + DIVA_OS_MEM_DETACH_PROM(&a->xdi_adapter, flash); + config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); config[LOW_BOOTCS_DREG] = 0xFC; /* Disable FLASH EPROM access */ config[HI_BOOTCS_DREG] = 0xFF; + DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); if (memcmp(&data[48], "DIVAserverPR", 12)) { #if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */ @@ -791,22 +831,26 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a) /* Try to read Flash again */ - config = (byte *) a->resources.pci.addr[4]; - flash = (byte *) a->resources.pci.addr[3]; len = sizeof(data); + config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); if (!(config[0xc3c] & 0x08)) { config[0xc3c] |= 0x08; /* Base Address enable register */ } config[LOW_BOOTCS_DREG] = 0x00; config[HI_BOOTCS_DREG] = 0xFF; + DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); memset(data, '\0', len); + flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter); for (i = 0; i < len; i++) { data[i] = flash[0x8000 - len + i]; } + DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter, flash); + config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter); config[LOW_BOOTCS_DREG] = 0xFC; config[HI_BOOTCS_DREG] = 0xFF; + DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config); if (memcmp(&data[48], "DIVAserverPR", 12)) { DBG_ERR(("A: failed to read serial number")) @@ -907,7 +951,8 @@ dsp_check_presence(volatile byte * addr, volatile byte * data, int dsp) */ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a) { - byte *base = a->resources.pci.addr[2]; + byte *base; + byte *p; dword ret = 0; dword row_offset[7] = { 0x00000000, @@ -921,14 +966,17 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a) byte *dsp_addr_port, *dsp_data_port, row_state; int dsp_row = 0, dsp_index, dsp_num; - if (!base || !a->xdi_adapter.reset) { + if (!a->xdi_adapter.Control || !a->xdi_adapter.reset) { return (0); } - *(volatile byte *) (a->xdi_adapter.reset) = - _MP_RISC_RESET | _MP_DSP_RESET; + p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter); + *(volatile byte *) p = _MP_RISC_RESET | _MP_DSP_RESET; + DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p); diva_os_wait(5); + base = DIVA_OS_MEM_ATTACH_CONTROL(&a->xdi_adapter); + for (dsp_num = 0; dsp_num < 30; dsp_num++) { dsp_row = dsp_num / 7 + 1; dsp_index = dsp_num % 7; @@ -947,9 +995,11 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a) ret |= (1 << dsp_num); } } + DIVA_OS_MEM_DETACH_CONTROL(&a->xdi_adapter, base); - *(volatile byte *) (a->xdi_adapter.reset) = - _MP_RISC_RESET | _MP_LED1 | _MP_LED2; + p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter); + *(volatile byte *) p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2; + DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p); diva_os_wait(5); /* diff --git a/drivers/isdn/hardware/eicon/platform.h b/drivers/isdn/hardware/eicon/platform.h index bfb939de6c88c..df33363509fb9 100644 --- a/drivers/isdn/hardware/eicon/platform.h +++ b/drivers/isdn/hardware/eicon/platform.h @@ -106,6 +106,36 @@ #define _cdecl #endif +#define MEM_TYPE_RAM 0 +#define MEM_TYPE_PORT 1 +#define MEM_TYPE_PROM 2 +#define MEM_TYPE_CTLREG 3 +#define MEM_TYPE_RESET 4 +#define MEM_TYPE_CFG 5 +#define MEM_TYPE_ADDRESS 6 +#define MEM_TYPE_CONFIG 7 +#define MEM_TYPE_CONTROL 8 + +#define DIVA_OS_MEM_ATTACH_RAM(a) ((a)->ram) +#define DIVA_OS_MEM_ATTACH_PORT(a) ((a)->port) +#define DIVA_OS_MEM_ATTACH_PROM(a) ((a)->prom) +#define DIVA_OS_MEM_ATTACH_CTLREG(a) ((a)->ctlReg) +#define DIVA_OS_MEM_ATTACH_RESET(a) ((a)->reset) +#define DIVA_OS_MEM_ATTACH_CFG(a) ((a)->cfg) +#define DIVA_OS_MEM_ATTACH_ADDRESS(a) ((a)->Address) +#define DIVA_OS_MEM_ATTACH_CONFIG(a) ((a)->Config) +#define DIVA_OS_MEM_ATTACH_CONTROL(a) ((a)->Control) + +#define DIVA_OS_MEM_DETACH_RAM(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_PORT(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_PROM(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_CTLREG(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_RESET(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_CFG(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_ADDRESS(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_CONFIG(a, x) do { } while(0) +#define DIVA_OS_MEM_DETACH_CONTROL(a, x) do { } while(0) + #if !defined(DIM) #define DIM(array) (sizeof (array)/sizeof ((array)[0])) #endif diff --git a/drivers/isdn/hardware/eicon/s_4bri.c b/drivers/isdn/hardware/eicon/s_4bri.c index 62d089d4b739f..b869651daeed8 100644 --- a/drivers/isdn/hardware/eicon/s_4bri.c +++ b/drivers/isdn/hardware/eicon/s_4bri.c @@ -55,8 +55,8 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { * check for trapped MIPS 46xx CPU, dump exception frame */ + base = DIVA_OS_MEM_ATTACH_CONTROL(IoAdapter); offset = IoAdapter->ControllerNumber * (IoAdapter->MemorySize >> factor) ; - base = IoAdapter->ram - offset - ((IoAdapter->MemorySize >> factor) - MQ_SHARED_RAM_SIZE) ; TrapID = READ_DWORD(&base[0x80]) ; @@ -75,8 +75,10 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { if ( (regs[0] >= offset) && (regs[0] < offset + (IoAdapter->MemorySize >> factor) - 1) ) { - if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) + if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) { + DIVA_OS_MEM_DETACH_CONTROL(IoAdapter, base); return ; + } size = offset + (IoAdapter->MemorySize >> factor) - regs[0] ; if ( size > MAX_XLOG_SIZE ) @@ -89,7 +91,7 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { diva_os_free (0, Xlog) ; IoAdapter->trapped = 2 ; } - + DIVA_OS_MEM_DETACH_CONTROL(IoAdapter, base); } /* -------------------------------------------------------------------------- @@ -97,10 +99,10 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { -------------------------------------------------------------------------- */ static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) { word volatile *qBriReset ; - dword volatile *qBriCntrl ; + byte volatile *qBriCntrl ; + byte volatile *p ; - qBriReset = (word volatile *)IoAdapter->prom ; - qBriCntrl = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)]); + qBriReset = (word volatile *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter); WRITE_WORD(qBriReset, READ_WORD(qBriReset) | PLX9054_SOFT_RESET) ; diva_os_wait (1) ; WRITE_WORD(qBriReset, READ_WORD(qBriReset) & ~PLX9054_SOFT_RESET) ; @@ -109,34 +111,40 @@ static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) { diva_os_wait (1) ; WRITE_WORD(qBriReset, READ_WORD(qBriReset) & ~PLX9054_RELOAD_EEPROM) ; diva_os_wait (1); + DIVA_OS_MEM_DETACH_PROM(IoAdapter, qBriReset); - WRITE_DWORD(qBriCntrl, 0) ; + qBriCntrl = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + p = &qBriCntrl[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)]; + WRITE_DWORD(p, 0) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, qBriCntrl); DBG_TRC(("resetted board @ reset addr 0x%08lx", qBriReset)) - DBG_TRC(("resetted board @ cntrl addr 0x%08lx", qBriCntrl)) - + DBG_TRC(("resetted board @ cntrl addr 0x%08lx", p)) } /* -------------------------------------------------------------------------- Start Card CPU -------------------------------------------------------------------------- */ void start_qBri_hardware (PISDN_ADAPTER IoAdapter) { - dword volatile *qBriReset ; + byte volatile *qBriReset ; + byte volatile *p ; - qBriReset = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)]); + p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + qBriReset = &p[(DIVA_4BRI_REVISION(IoAdapter)) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)]; WRITE_DWORD(qBriReset, MQ_RISC_COLD_RESET_MASK) ; diva_os_wait (2) ; WRITE_DWORD(qBriReset, MQ_RISC_WARM_RESET_MASK | MQ_RISC_COLD_RESET_MASK) ; diva_os_wait (10) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); DBG_TRC(("started processor @ addr 0x%08lx", qBriReset)) - } /* -------------------------------------------------------------------------- Stop Card CPU -------------------------------------------------------------------------- */ static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) { + byte volatile *p ; dword volatile *qBriReset ; dword volatile *qBriIrq ; dword volatile *qBriIsacDspReset ; @@ -147,16 +155,24 @@ static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) { if ( IoAdapter->ControllerNumber > 0 ) return ; - qBriReset = (dword volatile *)(&IoAdapter->ctlReg[reset_offset]) ; - qBriIrq = (dword volatile *)(&IoAdapter->ctlReg[irq_offset]) ; - qBriIsacDspReset = (dword volatile *)(&IoAdapter->ctlReg[hw_offset]); + p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + qBriReset = (dword volatile *)&p[reset_offset]; + qBriIsacDspReset = (dword volatile *)&p[hw_offset]; /* * clear interrupt line (reset Local Interrupt Test Register) */ WRITE_DWORD(qBriReset, 0) ; WRITE_DWORD(qBriIsacDspReset, 0) ; - IoAdapter->reset[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */ + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); + + p = (byte volatile *)DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + p[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */ + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); + + p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + qBriIrq = (dword volatile *)&p[irq_offset]; WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); DBG_TRC(("stopped processor @ addr 0x%08lx", qBriReset)) @@ -260,7 +276,7 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { int bit ; byte *File ; dword code, FileLength ; - word volatile *addr = (word volatile *)IoAdapter->prom ; + word volatile *addr = (word volatile *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter); word val, baseval = FPGA_CS | FPGA_PROG ; @@ -291,8 +307,10 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { File = qBri_check_FPGAsrc (IoAdapter, "ds4bri.bit", &FileLength, &code) ; } - if ( !File ) + if ( !File ) { + DIVA_OS_MEM_DETACH_PROM(IoAdapter, addr); return (0) ; + } /* * prepare download, pulse PROGRAM pin down. */ @@ -306,6 +324,7 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { { DBG_FTL(("FPGA download: acknowledge for FPGA memory clear missing")) xdiFreeFile (File) ; + DIVA_OS_MEM_DETACH_PROM(IoAdapter, addr); return (0) ; } /* @@ -329,6 +348,8 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { diva_os_wait (100) ; val = READ_WORD(addr) ; + DIVA_OS_MEM_DETACH_PROM(IoAdapter, addr); + if ( !(val & FPGA_BUSY) ) { DBG_FTL(("FPGA download: chip remains in busy state (0x%04x)", val)) @@ -343,12 +364,10 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { Download protocol code to the adapter -------------------------------------------------------------------------- */ -#define DOWNLOAD_ADDR(IoAdapter) (&IoAdapter->ram[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)]) - - static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdapter) { PISDN_ADAPTER HighIoAdapter; + byte *p; dword FileLength ; dword *sharedRam, *File; dword Addr, ProtOffset, SharedRamOffset, i; @@ -436,7 +455,8 @@ static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdap return (0) ; } IoAdapter->downloadAddr = 0 ; - sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; + p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter); + sharedRam = (dword *)&p[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)]; memcpy (sharedRam, File, FileLength) ; DBG_TRC(("Download addr 0x%08x len %ld - virtual 0x%08x", @@ -449,10 +469,12 @@ static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdap DBG_FTL(("File=0x%x, sharedRam=0x%x", File, sharedRam)) DBG_BLK(( (char *)File, 256)) DBG_BLK(( (char *)sharedRam, 256)) + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); xdiFreeFile (File) ; return (0) ; } + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); xdiFreeFile (File) ; return (1) ; @@ -466,6 +488,7 @@ static long qBri_download_buffer (OsFileHandle *fp, long length, void **addr) { PISDN_ADAPTER IoAdapter; word i ; dword *sharedRam ; + byte *p; i = 0 ; @@ -485,12 +508,14 @@ static long qBri_download_buffer (OsFileHandle *fp, long length, void **addr) { IoAdapter->downloadAddr + length)) return (-1) ; } - sharedRam = (dword*)(&BaseIoAdapter->ram[IoAdapter->downloadAddr & - (IoAdapter->MemorySize - 1)]) ; - + p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter); + sharedRam = (dword*)&p[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)]; - if ( fp->sysFileRead (fp, sharedRam, length) != length ) + if ( fp->sysFileRead (fp, sharedRam, length) != length ) { + DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p); return (-1) ; + } + DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p); IoAdapter->downloadAddr += length ; IoAdapter->downloadAddr = (IoAdapter->downloadAddr + 3) & (~3) ; @@ -509,6 +534,7 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) { word download_count, i ; dword *sharedRam ; dword FileLength ; + byte *p; if ( !(fp = OsOpenFile (DSP_TELINDUS_FILE)) ) { DBG_FTL(("qBri_telindus_load: %s not found!", DSP_TELINDUS_FILE)) @@ -553,8 +579,8 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) { * store # of download files extracted from the archive and download table */ HighIoAdapter->downloadAddr = HighIoAdapter->DspCodeBaseAddr ; - sharedRam = (dword *)(&BaseIoAdapter->ram[HighIoAdapter->downloadAddr & - (IoAdapter->MemorySize - 1)]) ; + p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter); + sharedRam = (dword *)&p[HighIoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)]; WRITE_DWORD(&(sharedRam[0]), (dword)download_count); memcpy (&sharedRam[1], &download_table[0], sizeof(download_table)) ; @@ -563,6 +589,7 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) { if ( memcmp (&sharedRam[1], &download_table, download_count) ) { DBG_FTL(("%s: Dsp Memory test failed!", IoAdapter->Properties.Name)) } + DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p); return (FileLength) ; } @@ -588,6 +615,7 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter, dword phys_start_addr; dword end_addr; byte* sharedRam = 0; + byte *p; if (task) { if (!(fp = OsOpenFile (task))) { @@ -657,18 +685,22 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter, } fp->sysFileSeek (fp, 0, OS_SEEK_SET); - sharedRam = &BaseIoAdapter->ram[phys_start_addr]; + p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter); + sharedRam = &p[phys_start_addr]; if ((dword)fp->sysFileRead (fp, sharedRam, FileLength) != FileLength) { + DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p); OsCloseFile (fp) ; DBG_ERR(("Can't read image [%s]", task)) return (0); } + DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p); OsCloseFile (fp) ; } + p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter); if (!link_addr) { - link_addr = &BaseIoAdapter->ram[OFFS_DSP_CODE_BASE_ADDR]; + link_addr = &p[OFFS_DSP_CODE_BASE_ADDR]; } DBG_TRC(("Write task [%s] link %08lx at %08lx", @@ -681,6 +713,8 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter, link_addr[2] = (byte)((start_addr >> 16) & 0xff); link_addr[3] = (byte)((start_addr >> 24) & 0xff); + DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p); + return (task ? &sharedRam[DIVA_MIPS_TASK_IMAGE_LINK_OFFS] : 0); } @@ -691,6 +725,7 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { dword i, offset, controller ; word *signature ; int factor = (IoAdapter->tasks == 1) ? 1 : 2; + byte *p; PISDN_ADAPTER Slave ; @@ -751,7 +786,8 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { Slave->reset = IoAdapter->reset ; Slave->ctlReg = IoAdapter->ctlReg ; Slave->prom = IoAdapter->prom ; - Slave->reset = IoAdapter->reset ; + Slave->Config = IoAdapter->Config ; + Slave->Control = IoAdapter->Control ; if ( !qBri_protocol_load (IoAdapter, Slave) ) return (0) ; @@ -782,9 +818,11 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { { Slave = IoAdapter->QuadroList->QuadroAdapter[i] ; Slave->ram += (IoAdapter->MemorySize >> factor) - MQ_SHARED_RAM_SIZE ; + p = DIVA_OS_MEM_ATTACH_RAM(Slave); DBG_TRC(("Configure instance %d shared memory @ 0x%08lx", - Slave->ControllerNumber, Slave->ram)) - memset (Slave->ram, '\0', 256) ; + Slave->ControllerNumber, p)) + memset (p, '\0', 256) ; + DIVA_OS_MEM_DETACH_RAM(Slave, p); diva_configure_protocol (Slave); } @@ -792,7 +830,8 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { * start adapter */ start_qBri_hardware (IoAdapter) ; - signature = (word *)(&IoAdapter->ram[0x1E]) ; + p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter); + signature = (word *)(&p[0x1E]) ; /* * wait for signature in shared memory (max. 3 seconds) */ @@ -802,12 +841,14 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { if ( signature[0] == 0x4447 ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); DBG_TRC(("Protocol startup time %d.%02d seconds", (i / 100), (i % 100) )) return (1) ; } } + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); DBG_FTL(("%s: Adapter selftest failed (0x%04X)!", IoAdapter->Properties.Name, signature[0] >> 16)) qBri_cpu_trapped (IoAdapter) ; @@ -829,16 +870,23 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) { word i ; int serviced = 0 ; + byte *p; + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); - if ( !(IoAdapter->reset[PLX9054_INTCSR] & 0x80) ) + if ( !(p[PLX9054_INTCSR] & 0x80) ) { + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); return (0) ; + } + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); /* * clear interrupt line (reset Local Interrupt Test Register) */ - qBriIrq = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]); + p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + qBriIrq = (dword volatile *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]); WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); for ( i = 0 ; i < IoAdapter->tasks; ++i ) { @@ -861,15 +909,21 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) { -------------------------------------------------------------------------- */ static void disable_qBri_interrupt (PISDN_ADAPTER IoAdapter) { dword volatile *qBriIrq ; + byte *p; if ( IoAdapter->ControllerNumber > 0 ) return ; - qBriIrq = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]); /* * clear interrupt line (reset Local Interrupt Test Register) */ - IoAdapter->reset[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */ + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + p[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */ + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); + + p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + qBriIrq = (dword volatile *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]); WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); } /* -------------------------------------------------------------------------- diff --git a/drivers/isdn/hardware/eicon/s_bri.c b/drivers/isdn/hardware/eicon/s_bri.c index bbfba867544d3..24df86bf41436 100644 --- a/drivers/isdn/hardware/eicon/s_bri.c +++ b/drivers/isdn/hardware/eicon/s_bri.c @@ -45,15 +45,16 @@ static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) { word *Xlog ; dword regs[4], i, size ; Xdesc xlogDesc ; + byte *Port; /* * first read pointers and trap frame */ if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) return ; - addrHi = IoAdapter->port - + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ; - addrLo = IoAdapter->port + ADDR ; - ioaddr = IoAdapter->port + DATA ; + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ; + addrLo = Port + ADDR ; + ioaddr = Port + DATA ; outpp (addrHi, 0) ; outppw (addrLo, 0) ; for ( i = 0 ; i < 0x100 ; Xlog[i++] = inppw(ioaddr) ) ; @@ -95,21 +96,28 @@ static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) { outpp (addrHi, (byte)((BRI_UNCACHED_ADDR (IoAdapter->MemoryBase + IoAdapter->MemorySize - BRI_SHARED_RAM_SIZE)) >> 16)) ; outppw (addrLo, 0x00) ; + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); } /* --------------------------------------------------------------------- Reset hardware --------------------------------------------------------------------- */ static void reset_bri_hardware (PISDN_ADAPTER IoAdapter) { - outpp (IoAdapter->ctlReg, 0x00) ; + byte *p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + outpp (p, 0x00) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); } /* --------------------------------------------------------------------- Halt system --------------------------------------------------------------------- */ static void stop_bri_hardware (PISDN_ADAPTER IoAdapter) { - if (IoAdapter->reset) { - outpp (IoAdapter->reset, 0x00) ; /* disable interrupts ! */ + byte *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + if (p) { + outpp (p, 0x00) ; /* disable interrupts ! */ } - outpp (IoAdapter->ctlReg, 0x00) ; /* clear int, halt cpu */ + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); + p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + outpp (p, 0x00) ; /* clear int, halt cpu */ + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); } #if !defined(DIVA_USER_MODE_CARD_CONFIG) /* { */ /* --------------------------------------------------------------------- @@ -121,6 +129,7 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) { byte* addrHi, *addrLo, *ioaddr ; char *FileName = &IoAdapter->Protocol[0] ; dword Addr, i ; + byte *Port; /* ------------------------------------------------------------------- Try to load protocol code. 'File' points to memory location that does contain entire protocol code @@ -173,10 +182,10 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) { DBG_FTL(("Protocol code '%s' too big (%ld)", FileName, FileLength)) return (0) ; } - addrHi = IoAdapter->port - + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ; - addrLo = IoAdapter->port + ADDR ; - ioaddr = IoAdapter->port + DATA ; + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ; + addrLo = Port + ADDR ; + ioaddr = Port + DATA ; /* * set start address for download (use autoincrement mode !) */ @@ -204,12 +213,14 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) { test = inppw (ioaddr) ; if ( test != File[i/2] ) { + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); DBG_FTL(("%s: Memory test failed! (%d - 0x%04X/0x%04X)", IoAdapter->Properties.Name, i, test, File[i/2])) xdiFreeFile (File); return (0) ; } } + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); xdiFreeFile (File); return (FileLength) ; } @@ -290,6 +301,7 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) t_dsp_portable_desc download_table[DSP_MAX_DOWNLOAD_COUNT] ; word download_count ; dword FileLength ; + byte *Port; if (!pinfo) { DBG_ERR (("A: out of memory s_bri at %d", __LINE__)) return (0); @@ -299,11 +311,11 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) return (0) ; } FileLength = fp->sysFileSize ; + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); pinfo->IoAdapter = IoAdapter ; - pinfo->AddrLo = IoAdapter->port + ADDR ; - pinfo->AddrHi = IoAdapter->port +\ - (IoAdapter->Properties.Bus == BUS_PCI ? M_PCI_ADDRH : ADDRH); - pinfo->Data = (word*)(IoAdapter->port + DATA) ; + pinfo->AddrLo = Port + ADDR ; + pinfo->AddrHi = Port + (IoAdapter->Properties.Bus == BUS_PCI ? M_PCI_ADDRH : ADDRH); + pinfo->Data = (word*)(Port + DATA) ; pinfo->DownloadPos = (IoAdapter->DspCodeBaseAddr +\ sizeof(dword) + sizeof(download_table) + 3) & (~3) ; fp->sysLoadDesc = (void *)pinfo; @@ -317,6 +329,7 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) &download_count, NULL, &download_table[0]) ; if ( error ) { + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); DBG_FTL(("download file error: %s", error)) OsCloseFile (fp) ; diva_os_free (0, pinfo); @@ -335,23 +348,25 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) * copy download table to board */ outppw_buffer (pinfo->Data, &download_table[0], sizeof(download_table)) ; + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); diva_os_free (0, pinfo); return (FileLength) ; } /******************************************************************************/ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { dword i ; - byte* addrHi, *addrLo, *ioaddr ; + byte* addrHi, *addrLo, *ioaddr, *p ; dword test ; + byte *Port; if ( IoAdapter->Properties.Card != CARD_MAE ) { return (FALSE) ; } - addrHi = IoAdapter->port \ - + ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH); - addrLo = IoAdapter->port + ADDR ; - ioaddr = IoAdapter->port + DATA ; reset_bri_hardware (IoAdapter) ; + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH); + addrLo = Port + ADDR ; + ioaddr = Port + DATA ; diva_os_wait (100); /* * recover @@ -366,6 +381,7 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { IoAdapter->MemorySize - BRI_SHARED_RAM_SIZE)) >> 16)) ; outppw (addrLo, 0) ; for ( i = 0 ; i < 0x8000 ; outppw (ioaddr, 0), ++i ) ; + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); diva_os_wait (100) ; /* * download protocol and dsp files @@ -396,6 +412,11 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { return (FALSE) ; break ; } + + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH); + addrLo = Port + ADDR ; + ioaddr = Port + DATA ; /* * clear signature */ @@ -408,13 +429,20 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { * copy parameters */ diva_configure_protocol (IoAdapter); + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); /* * start the protocol code */ - outpp (IoAdapter->ctlReg, 0x08) ; + p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + outpp (p, 0x08) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); /* * wait for signature (max. 3 seconds) */ + Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter); + addrHi = Port + ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH); + addrLo = Port + ADDR ; + ioaddr = Port + DATA ; for ( i = 0 ; i < 300 ; ++i ) { diva_os_wait (10) ; @@ -424,11 +452,13 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { test = (dword)inppw (ioaddr) ; if ( test == 0x4447 ) { + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); DBG_TRC(("Protocol startup time %d.%02d seconds", (i / 100), (i % 100) )) return (TRUE) ; } } + DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port); DBG_FTL(("%s: Adapter selftest failed (0x%04X)!", IoAdapter->Properties.Name, test)) bri_cpu_trapped (IoAdapter) ; @@ -441,12 +471,18 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { #endif /* } */ /******************************************************************************/ static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) { - if ( !(inpp (IoAdapter->ctlReg) & 0x01) ) + byte *p; + + p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + if ( !(inpp (p) & 0x01) ) { + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); return (0) ; + } /* clear interrupt line */ - outpp (IoAdapter->ctlReg, 0x08) ; + outpp (p, 0x08) ; + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); IoAdapter->IrqCount++ ; if ( IoAdapter->Initialized ) { diva_os_schedule_soft_isr (&IoAdapter->isr_soft_isr); @@ -457,11 +493,16 @@ static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) { Disable IRQ in the card hardware -------------------------------------------------------------------------- */ static void disable_bri_interrupt (PISDN_ADAPTER IoAdapter) { - if ( IoAdapter->reset ) + byte *p; + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + if ( p ) { - outpp (IoAdapter->reset, 0x00) ; /* disable interrupts ! */ + outpp (p, 0x00) ; /* disable interrupts ! */ } - outpp (IoAdapter->ctlReg, 0x00) ; /* clear int, halt cpu */ + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); + p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter); + outpp (p, 0x00) ; /* clear int, halt cpu */ + DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p); } /* ------------------------------------------------------------------------- Fill card entry points diff --git a/drivers/isdn/hardware/eicon/s_pri.c b/drivers/isdn/hardware/eicon/s_pri.c index 2cfa06e6bb263..e1f13e05e5ada 100644 --- a/drivers/isdn/hardware/eicon/s_pri.c +++ b/drivers/isdn/hardware/eicon/s_pri.c @@ -54,7 +54,7 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) { /* * check for trapped MIPS 46xx CPU, dump exception frame */ - base = IoAdapter->ram - MP_SHARED_RAM_OFFSET ; + base = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter); TrapID = READ_DWORD(&base[0x80]) ; if ( (TrapID == 0x99999999) || (TrapID == 0x99999901) ) { @@ -68,8 +68,10 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) { regs[0] &= IoAdapter->MemorySize - 1 ; if ( (regs[0] < IoAdapter->MemorySize - 1) ) { - if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) + if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) { + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, base); return ; + } size = IoAdapter->MemorySize - regs[0] ; if ( size > MAX_XLOG_SIZE ) size = MAX_XLOG_SIZE ; @@ -81,24 +83,29 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) { diva_os_free (0, Xlog) ; IoAdapter->trapped = 2 ; } + DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, base); } /* ------------------------------------------------------------------------- Hardware reset of PRI card ------------------------------------------------------------------------- */ static void reset_pri_hardware (PISDN_ADAPTER IoAdapter) { - *IoAdapter->reset = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ; + byte *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + *p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ; diva_os_wait (50) ; - *IoAdapter->reset = 0x00 ; + *p = 0x00 ; diva_os_wait (50) ; + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); } /* ------------------------------------------------------------------------- Stop Card Hardware ------------------------------------------------------------------------- */ static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) { dword i; - dword volatile *cfgReg = (dword volatile *)IoAdapter->cfg ; + byte *p; + dword volatile *cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter); cfgReg[3] = 0x00000000 ; cfgReg[1] = 0x00000000 ; + DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg); IoAdapter->a.ram_out (&IoAdapter->a, &RAM->SWReg, SWREG_HALT_CPU) ; i = 0 ; while ( (i < 100) && (IoAdapter->a.ram_in (&IoAdapter->a, &RAM->SWReg) != 0) ) @@ -107,21 +114,25 @@ static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) { i++ ; } DBG_TRC(("%s: PRI stopped (%d)", IoAdapter->Name, i)) + cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter); WRITE_DWORD(&cfgReg[0],((dword)(~0x03E00000))); + DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg); diva_os_wait (1) ; - *IoAdapter->reset = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ; + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + *p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ; + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); } #if !defined(DIVA_USER_MODE_CARD_CONFIG) /* { */ /* ------------------------------------------------------------------------- Load protocol code to the PRI Card ------------------------------------------------------------------------- */ -#define DOWNLOAD_ADDR(IoAdapter) \ - (&IoAdapter->ram[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)]) +#define DOWNLOAD_ADDR(IoAdapter) (IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)) static int pri_protocol_load (PISDN_ADAPTER IoAdapter) { dword FileLength ; dword *File ; dword *sharedRam ; dword Addr ; + byte *p; if (!(File = (dword *)xdiLoadArchive (IoAdapter, &FileLength, 0))) { return (0) ; } @@ -172,14 +183,17 @@ static int pri_protocol_load (PISDN_ADAPTER IoAdapter) { return (0) ; } IoAdapter->downloadAddr = MP_UNCACHED_ADDR (MP_PROTOCOL_OFFSET) ; - sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; + p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter); + sharedRam = (dword *)(&p[DOWNLOAD_ADDR(IoAdapter)]); memcpy (sharedRam, File, FileLength) ; if ( memcmp (sharedRam, File, FileLength) ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); DBG_FTL(("%s: Memory test failed!", IoAdapter->Properties.Name)) xdiFreeFile (File); return (0) ; } + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); xdiFreeFile (File); return (1) ; } @@ -228,8 +242,8 @@ dsp_check_presence (volatile byte* addr, volatile byte* data, int dsp) static dword diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) { - /* byte* base = a->resources.pci.addr[2]; */ - byte* base = IoAdapter->reset - MP_RESET ; + byte* base; + byte* p; dword ret = 0, DspCount = 0 ; dword row_offset[] = { 0x00000000, @@ -242,14 +256,18 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) byte *dsp_addr_port, *dsp_data_port, row_state; int dsp_row = 0, dsp_index, dsp_num; IoAdapter->InitialDspInfo &= 0xffff ; - /* if (!base || !a->xdi_adapter.reset) */ - if (!base || !IoAdapter->reset) + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + if (!p) { + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); return (0); } - /* *(volatile byte*)(a->xdi_adapter.reset) = _MP_RISC_RESET | _MP_DSP_RESET; */ - *(volatile byte*)(IoAdapter->reset) = _MP_RISC_RESET | _MP_DSP_RESET; + *(volatile byte*)(p) = _MP_RISC_RESET | _MP_DSP_RESET; + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); diva_os_wait (5) ; + + base = DIVA_OS_MEM_ATTACH_CONTROL(IoAdapter); + for (dsp_num = 0; dsp_num < 30; dsp_num++) { dsp_row = dsp_num / 7 + 1; dsp_index = dsp_num % 7; @@ -264,8 +282,10 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) DspCount++ ; } } - /* *(volatile byte*)(a->xdi_adapter.reset) = _MP_RISC_RESET | _MP_LED1 | _MP_LED2; */ - *(volatile byte*)(IoAdapter->reset) = _MP_RISC_RESET | _MP_LED1 | _MP_LED2; + DIVA_OS_MEM_DETACH_CONTROL(IoAdapter, base); + + p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter); + *(volatile byte*)(p) = _MP_RISC_RESET | _MP_LED1 | _MP_LED2; diva_os_wait (50) ; /* Verify modules @@ -301,7 +321,8 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) ((ret >> (3*7)) & 0x7F) ? "Y" : "N")) DBG_LOG(("+-----------------------+")) DBG_LOG(("DSP's(present-absent):%08x-%08x", ret, ~ret & 0x3fffffff)) - *(volatile byte*)(IoAdapter->reset) = 0 ; + *(volatile byte*)(p) = 0 ; + DIVA_OS_MEM_DETACH_RESET(IoAdapter, p); diva_os_wait (50) ; IoAdapter->InitialDspInfo |= DspCount << 16 ; return (ret); @@ -312,6 +333,7 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) static long pri_download_buffer (OsFileHandle *fp, long length, void **addr) { PISDN_ADAPTER IoAdapter = (PISDN_ADAPTER)fp->sysLoadDesc ; dword *sharedRam ; + byte *p; *addr = (void *)IoAdapter->downloadAddr ; if ( ((dword) length) > IoAdapter->DspCodeBaseAddr + IoAdapter->MaxDspCodeSize - IoAdapter->downloadAddr ) @@ -321,11 +343,15 @@ static long pri_download_buffer (OsFileHandle *fp, long length, void **addr) { IoAdapter->downloadAddr + length)) return (-1) ; } - sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; - if ( fp->sysFileRead (fp, sharedRam, length) != length ) + p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter); + sharedRam = (dword *)(&p[DOWNLOAD_ADDR(IoAdapter)]); + if ( fp->sysFileRead (fp, sharedRam, length) != length ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); return (-1) ; + } IoAdapter->downloadAddr += length ; IoAdapter->downloadAddr = (IoAdapter->downloadAddr + 3) & (~3) ; + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); return (0) ; } /* ------------------------------------------------------------------------- @@ -338,6 +364,7 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) { word download_count ; dword *sharedRam ; dword FileLength ; + byte *p; if ( !(fp = OsOpenFile (DSP_TELINDUS_FILE)) ) return (0) ; IoAdapter->downloadAddr = (IoAdapter->DspCodeBaseAddr @@ -363,9 +390,11 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) { * store # of separate download files extracted from archive */ IoAdapter->downloadAddr = IoAdapter->DspCodeBaseAddr ; - sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; + p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter); + sharedRam = (dword *)(&p[DOWNLOAD_ADDR(IoAdapter)]); WRITE_DWORD(&(sharedRam[0]), (dword)download_count); memcpy (&sharedRam[1], &download_table[0], sizeof(download_table)) ; + DIVA_OS_MEM_DETACH_RAM(IoAdapter, p); return (FileLength) ; } /* ------------------------------------------------------------------------- @@ -374,14 +403,17 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) { #define MIN_DSPS 0x30000000 static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { dword i ; - struct mp_load *boot = (struct mp_load *)IoAdapter->ram ; - if ( IoAdapter->Properties.Card != CARD_MAEP ) + struct mp_load *boot = (struct mp_load *)DIVA_OS_MEM_ATTACH_RAM(IoAdapter); + if ( IoAdapter->Properties.Card != CARD_MAEP ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); return (0) ; + } boot->err = 0 ; #if 0 IoAdapter->rstFnc (IoAdapter) ; #else if ( MIN_DSPS != (MIN_DSPS & diva_pri_detect_dsps(IoAdapter)) ) { /* makes reset */ + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); DBG_FTL(("%s: DSP error!", IoAdapter->Properties.Name)) return (0) ; } @@ -394,28 +426,36 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { diva_os_wait (10) ; if ( i == boot->live ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); DBG_FTL(("%s: CPU is not alive!", IoAdapter->Properties.Name)) return (0) ; } if ( boot->err ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); DBG_FTL(("%s: Board Selftest failed!", IoAdapter->Properties.Name)) return (0) ; } /* * download protocol and dsp files */ - if ( !xdiSetProtocol (IoAdapter, IoAdapter->ProtocolSuffix) ) + if ( !xdiSetProtocol (IoAdapter, IoAdapter->ProtocolSuffix) ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); return (0) ; - if ( !pri_protocol_load (IoAdapter) ) + } + if ( !pri_protocol_load (IoAdapter) ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); return (0) ; - if ( !pri_telindus_load (IoAdapter) ) + } + if ( !pri_telindus_load (IoAdapter) ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); return (0) ; + } /* * copy configuration parameters */ IoAdapter->ram += MP_SHARED_RAM_OFFSET ; - memset (IoAdapter->ram, '\0', 256) ; + memset (boot + MP_SHARED_RAM_OFFSET, '\0', 256) ; diva_configure_protocol (IoAdapter); /* * start adapter @@ -430,11 +470,13 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { diva_os_wait (10) ; if ( (boot->signature >> 16) == 0x4447 ) { + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); DBG_TRC(("Protocol startup time %d.%02d seconds", (i / 100), (i % 100) )) return (1) ; } } + DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot); DBG_FTL(("%s: Adapter selftest failed (0x%04X)!", IoAdapter->Properties.Name, boot->signature >> 16)) pri_cpu_trapped (IoAdapter) ; @@ -449,12 +491,16 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { PRI Adapter interrupt Service Routine -------------------------------------------------------------------------- */ static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) { - if ( !((READ_DWORD((dword *)IoAdapter->cfg)) & 0x80000000) ) + byte *cfg = DIVA_OS_MEM_ATTACH_CFG(IoAdapter); + if ( !((READ_DWORD((dword *)cfg)) & 0x80000000) ) { + DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg); return (0) ; + } /* clear interrupt line */ - WRITE_DWORD(((dword *)IoAdapter->cfg), (dword)~0x03E00000) ; + WRITE_DWORD(((dword *)cfg), (dword)~0x03E00000) ; + DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg); IoAdapter->IrqCount++ ; if ( IoAdapter->Initialized ) { @@ -466,10 +512,11 @@ static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) { Disable interrupt in the card hardware ------------------------------------------------------------------------- */ static void disable_pri_interrupt (PISDN_ADAPTER IoAdapter) { - dword volatile *cfgReg = (dword volatile *)IoAdapter->cfg ; + dword volatile *cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter) ; cfgReg[3] = 0x00000000 ; cfgReg[1] = 0x00000000 ; WRITE_DWORD(&cfgReg[0], (dword)(~0x03E00000)) ; + DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg); } /* ------------------------------------------------------------------------- Install entry points for PRI Adapter -- 2.53.0